AOpen AX5T Uživatelská příručka stáhnout pdf

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AP5T/AX5T Special Test Notice

Please refer to following FAQ (Frequently Asked Question) for the special test notice and interesting

features of INTEL TX chipset.

1. TX memory performance.

2. TX DMA/33 performance.

3. SDRAM that can be used.

4. 75/83.3MHz external clock.

5. ACPI new features. (Modem ring-on, OnNow, Suspend to HDD)

6. P55C MMX

7. FCC DoC

Note: FAQ may be updated without notice. If

you cannot find the information that you need in

this appendix, visit our WWW home page,

(address: http://www.aopen.com.tw) and check

the FAQ area and other new information.

Q: What is MMX?

A: MMX is the new single-line multiple-instruction technology of the new Intel Pentium PP/MT (P55C)

CPU. A new Pentium Pro CPU (Klamath) with MMX technology is also expected to be released soon.

The MMX instructions are specifically useful for multimedia applications (such as 3D video, 3D

sound, video conference). The performance can be improved if applications use these instructions. All

AOpen MBs have at least dual power onboard to support PP/MT. It is not necessary to have special

chipset for MMX CPU.

Q: What is PBSRAM (Pipelined Burst SRAM)?

A: For Pentium CPU, the Burst means reading four QWord (Quad-word, 4x16 = 64 bits) continuously

with only the first address decoded by SRAM. The PBSRAM will automatically send the remaining

three QWord to CPU according to predefined sequence. The normal address decoding time for

SRAM is 2 to 3 clocks. This makes the CPU data read timing of four QWord to be at least 3-2-2-2

and a total of 9 clocks if traditional asynchronous SRAM is used. However, with PBSRAM, there is

no need to decode address for rest three Qword. Therefore, data read timing can be 3-1-1-1, that is

equivalent to 6 clocks and is faster than asynchronous SRAM.

Q: What is EDO (Extended Data Output) memory?

A: The EDO DRAM technology of EDO is actually very similar to FPM (Fast Page Mode). Unlike

traditional FPM that tri-states the memory output data to start the pre-charge activity, EDO DRAM

holds the memory data valid until the next memory access cycle, that is similar to pipeline effect and

reduces one clock state.

Q: What is SDRAM (Synchronous DRAM)?

A: The SDRAM is a new generation DRAM technology that allows DRAM to use the same clock as the

CPU host bus (EDO and FPM are asynchronous and do not have clock signal). The idea is the same

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Shrnutí obsahu

Strany 1 - AP5T/AX5T Special Test Notice

B-1AP5T/AX5T Special Test NoticePlease refer to following FAQ (Frequently Asked Question) for the special test notice and interestingfeatures of INTEL

Strany 2 - Frequently Asked Questions

Frequently Asked QuestionsB-2as "Burst" (refer to the previous Q & A). It requires only one clock for the 2nd, 3rd, and 4th QWord(for e

Strany 3 - Frequently Asked Question

Frequently Asked QuestionB-3Manufacturer Model SuggestedCAS LatencyTime5VToleranceSamsung KM416S1120AT-G12 2 YesNEC D4516161G5-A12-7JF 2 NoMicron MT4L

Strany 4

Frequently Asked QuestionsB-4Chipset Model DRAM Timing Winstone96Intel 430VX AP5VM EDO 6-2-2-2 86.1Intel 430HX AP53/AP5K EDO 5-2-2-2 86.8Intel 430TX A

Strany 5

Frequently Asked QuestionB-5DMA mode 1 30ns 5 150ns (1/150ns) x 2byte =13.3MB/sDMA mode 2 30ns 4 120ns (1/120ns) x 2byte =16.6MB/sDMA/33 30ns 4 120ns

Strany 6

Frequently Asked QuestionsB-6Q: What is ATX Soft Power On/Off and Momentary Switch?A: The Soft Power On of the ATX specification means to provide a st

Strany 7

Frequently Asked QuestionB-7do the same function, since the ACPI specification is not fully ready. AOpen AX5T/AX58 supportSuspend to Hard Disk through

Strany 8

Frequently Asked QuestionsB-8mainboard is more difficult than traditional FCC test. If the mainboard passes DoC test, that means ithas very low EMI ra